Senior Analog Layout Engineer, AMS & SoC Innovation in Cambridge

Senior Analog Layout Engineer, AMS & SoC Innovation in Cambridge

Cambridge Full-Time 63000 - 77000 £ / year (est.) No working from home possible
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At a Glance

  • Tasks: Create cutting-edge analog layouts and collaborate with designers to enhance performance.
  • Company: Join Apple's Silicon Engineering Group, a leader in innovation.
  • Benefits: Competitive salary, health benefits, and opportunities for professional growth.
  • Other info: Fast-paced environment with exciting challenges and career advancement.
  • Why this job: Be at the forefront of technology, shaping the future of advanced SoCs.
  • Qualifications: Experience in analog layout design and strong collaboration skills.

The predicted salary is between 63000 - 77000 £ per year.

Apple's Silicon Engineering Group in Cambridge seeks a Senior Analog Layout Engineer to translate concepts into silicon for advanced So Cs.

You will craft analog/mixed-signal layouts, review floorplans, and collaborate with circuit designers to push performance, area, and power envelopes.

You’ll run design verification, interpret LVS/DRC/ERC, manage tradeoffs, and drive layout quality in a fast-paced, collaborative environment.

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Senior Analog Layout Engineer, AMS & SoC Innovation in Cambridge employer: Apple Technical Recruitment

As an Associate Quantity Surveyor in London, you will join a dynamic team that values collaboration and innovation, offering a competitive salary of £85,000 - £95,000. The company fosters a supportive work culture with ample opportunities for professional development and career progression, ensuring that you can grow your skills while working on high-profile projects. With a focus on employee well-being and a commitment to excellence, this role provides a rewarding environment for those looking to make a significant impact in the construction industry.

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Contact Details:

Apple Technical Recruitment Recruitment Team

We think you need these skills to ace Senior Analog Layout Engineer, AMS & SoC Innovation in Cambridge

Analog Layout Design
Mixed-Signal Layouts
Floorplan Review
Collaboration with Circuit Designers
Design Verification
LVS/DRC/ERC Interpretation
Tradeoff Management