Apple Inc. in London is seeking an RTL engineer to work on PPA optimisation of the netlist for Apple Silicon GPUs. You will collaborate with RTL and Physical design teams to improve netlist quality milestones and push forward advanced GPU products.
The role requires a BSc in EE and experience with Verilog or SystemVerilog and scripting; knowledge of physical synthesis, timing analysis, and DFT is preferred. Apple values inclusive hiring and accessibility.
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GPU Front-End Architect & RTL Optimizer employer: Apple Inc.
At Apple, we foster a culture of innovation and collaboration, where diverse perspectives drive our success. As a Data Platform Infra Site Reliability Engineer in London, you'll enjoy competitive benefits, a commitment to employee growth, and the opportunity to work on cutting-edge technology that impacts millions globally. Join us to be part of a team that values your contributions and supports your career development in a dynamic environment.
