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- Tasks: Create innovative VHDL designs and verify FPGA projects in a hybrid work environment.
- Company: Leading tech firm with a focus on cutting-edge FPGA technology.
- Benefits: Competitive pay at £88/hour, overtime, and flexible remote work options.
- Other info: Opportunity for career growth in a supportive and innovative environment.
- Why this job: Join a dynamic team and make an impact in advanced FPGA development.
- Qualifications: 5+ years in FPGA development with VHDL or Verilog experience required.
The predicted salary is between 70000 - 90000 £ per year.
Location: Edinburgh, Luton, Bristol, Southampton (Hybrid, 2 days from home).
Salary: approximately £88 per hour + overtime.
Contract position. Virtual interview Mon–Fri.
Responsibilities- Creating innovative and robust VHDL‑based designs
- Documenting and recording deliverables
- Verifying FPGA designs
- Ensuring configuration management and maintaining designs under revision control
- Providing progress reports
- At least 5 years of experience developing FPGA using VHDL or Verilog
- Experience with Mentor Graphics FPGA development tools including HDL Designer, ModelSim/Questa, and Precision
- Familiarity with Xilinx, Intel (Altera), or Microsemi (Actel) design flows (ISE, Vivado, Quartus) and third‑party synthesis tools
- Experience specifying timing and area constraints for efficient FPGA Place and Route
- Independent verification using VHDL
- Experience with FPGA requirements capture and requirements management tools
- Knowledge of real‑time, embedded, safety‑critical FPGA development, preferably in accordance with RTCA/DO‑254 DAL A or B
- Independent verification using SystemVerilog/UVM
- Experience with embedded processor cores (e.g., ARM) in FPGA designs
If this role aligns with your expertise, please apply directly or contact Lukas via WhatsApp/phone.
Senior / Principal FPGA Engineer employer: American Society of Civil Engineers
Contact Detail:
American Society of Civil Engineers Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior / Principal FPGA Engineer
✨Tip Number 1
Network like a pro! Reach out to your connections in the FPGA field and let them know you're on the hunt for a Senior/Principal role. You never know who might have the inside scoop on openings or can refer you directly.
✨Tip Number 2
Prepare for those virtual interviews! Brush up on your VHDL and Verilog knowledge, and be ready to discuss your past projects. We want to see how you’ve tackled challenges and delivered results in your previous roles.
✨Tip Number 3
Showcase your skills with a portfolio! If you’ve got some cool FPGA designs or projects, compile them into a portfolio. This will give you an edge and show potential employers what you can bring to the table.
✨Tip Number 4
Don’t forget to apply through our website! It’s the best way to ensure your application gets seen by the right people. Plus, we love seeing candidates who take that extra step to connect with us directly.
We think you need these skills to ace Senior / Principal FPGA Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience with VHDL and FPGA development tools. We want to see how your skills match the job description, so don’t be shy about showcasing your relevant projects!
Craft a Compelling Cover Letter: Your cover letter is your chance to shine! Use it to explain why you’re the perfect fit for this role. We love seeing passion and enthusiasm, so let us know what excites you about working with FPGA technology.
Showcase Your Achievements: When detailing your experience, focus on specific achievements rather than just listing duties. We want to know how you’ve made an impact in your previous roles, especially in areas like independent verification and design flows.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the easiest way for us to keep track of your application and ensures you don’t miss out on any important updates from our team!
How to prepare for a job interview at American Society of Civil Engineers
✨Know Your VHDL Inside Out
Make sure you brush up on your VHDL skills before the interview. Be prepared to discuss your past projects and how you've tackled challenges in your designs. Having specific examples ready will show your depth of knowledge and experience.
✨Familiarise Yourself with Tools
Since the role requires experience with Mentor Graphics tools, take some time to review their functionalities. If you can, practice using HDL Designer or ModelSim/Questa. Being able to speak confidently about these tools will impress your interviewers.
✨Understand the Design Flows
Get a solid grasp of the design flows for Xilinx, Intel, or Microsemi. Knowing the ins and outs of ISE, Vivado, and Quartus will help you answer technical questions more effectively. It’s all about showing that you can hit the ground running!
✨Prepare for Real-Time Scenarios
Since the job involves safety-critical FPGA development, be ready to discuss your experience with real-time systems. Think about how you’ve ensured compliance with standards like RTCA/DO-254 and be prepared to share specific examples of your work in this area.