At a Glance
- Tasks: Join a team to optimise DSP algorithms for high-speed SerDes systems.
- Company: AMD, a leader in next-gen computing and innovation.
- Benefits: Hybrid work, competitive salary, and inclusive culture.
- Other info: Dynamic environment with opportunities for career advancement.
- Why this job: Make a real impact on cutting-edge technology in AI and connectivity.
- Qualifications: Experience in digital design and DSP algorithm development.
The predicted salary is between 63000 - 77000 £ per year.
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centres, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE: This is an outstanding opportunity for an experienced engineer passionate about digital signal processing (DSP) algorithms and their application in high-speed SerDes (Serializer/Deserializer) systems. As part of a team, you will optimize and implement advanced DSP algorithms and circuits for 200+Gbps SerDes, with a strong focus on power efficiency and optimization. Your work will directly impact the performance and robustness of AMD’s next-generation connectivity solutions for markets such as data centre networking, wireless telecommunications, and aerospace/defence.
KEY RESPONSIBILITIES:
- Collaborate with architects, hardware engineers, and verification engineers to implement and refine new DSP features for cutting-edge and next-generation SerDes transceivers.
- Implement DSP algorithms for equalization, filtering and sequence detection.
- RTL development using front-end ASIC tools (lint, synthesis, STA) to ensure the highest quality code.
- Develop comprehensive documentation detailing DSP algorithm interactions with SerDes hardware and software components.
PREFERRED EXPERIENCE:
- Strong background and experience in digital design techniques including clock domain crossing, RTL (preferably SystemVerilog), and ASIC front-end design tools and flows.
- Understanding of power analysis and power reduction techniques for optimization of digital circuitry.
- Experience in DSP algorithm development and implementation for SerDes, wireless communications or high-speed serial interfaces (Ethernet, PCIe, etc.).
- Experience of simulation and modeling of DSP algorithms.
LOCATION: Edinburgh, United Kingdom (Hybrid)
Staff SerDes Design Engineer in Edinburgh employer: AMD
At AMD, we are committed to fostering a dynamic and inclusive work environment where innovation thrives. As a Senior Design Engineer/Engineering Manager, you will lead a talented team dedicated to pushing the boundaries of microprocessor design, with ample opportunities for professional growth and mentorship. Our collaborative culture, combined with cutting-edge projects in a vibrant location, makes AMD an exceptional employer for those looking to make a meaningful impact in the tech industry.
