CPU Formal Verification Engineer in Cambridge

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

The Role

• Provide technical expertise for executing the functional verification strategy for next‑generation microprocessor designs.
• Maintain and enhance existing functional verification methodology.
• Improve existing infrastructure.
• Work on related projects and/or assignments as needed to meet team goals.
• Perform project definition, training, and documentation.
• Develop quality, timely, and cost‑effective solutions independently.
• Interface with architects and TG/PG (Clock Gating/Power Gating) RTL/Designers.

The Person

The ideal candidate will be able to work in a dynamic environment with a sense of urgency. Can work with global teams and develop effective working relationships with all stakeholders.

Responsibilities

• Perform functional feature verification of high‑speed Microprocessor designs, including the development of infrastructure, directed and random test suites at behavioral RTL level across SoC, Core, and block hierarchies.
• Develop environments, infrastructure, and test plans to accommodate both full chip and stand‑alone block‑level verification and debug capabilities using simulation tools, debug tools, and programming skills, based on an in‑depth understanding of the microprocessor's architecture and HDL (high definition language)/logical design.
• Develop an automated regression infrastructure setup for functional verification of high‑speed microprocessor designs.
• Based on a thorough understanding of the design architecture, develop, run, and debug x86 assembly‑based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design, leveraging C/C++/Perl/Python/assembly programming, logic design, and simulation skill set.
• Resolve all simulation discrepancies and assertion responses for both behavioral and gate‑level logic models.
• Measure and analyze coverage results and take necessary actions to fill in coverage holes.

Preferred Experience

• Understanding or technical expertise in functional verification of microprocessor designs.
• Experience with Verilog/System Verilog HDL, programming in Perl/Python, C/C++, and logic simulation is a requirement.
• Very strong understanding of computer architecture and assembly programming.
• Experience in CPU cache/memory subsystem verification is a plus.

Academic Credentials

• Bachelors or Masters degree in computer engineering/Electrical Engineering.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.