Senior Analog Design Engineer in Musselburgh

The Allegro team is united by a clear purpose - advancing technologies that make the world safer, more efficient, and more sustainable. With over 30 years of experience in semiconductor innovation, we bring that purpose to life across every part of the business. In this role you will design high-performance analog components that power our world‑class power management ICs and motor drivers.

What You’ll Do

• Design at the transistor level to deliver analog power management circuits (e.g. op‑amps, comparators, level‑shifters, gate drivers, charge pumps) that meet rigorous specifications from chip architects or analog leads.
• Use sound judgment and creativity to evaluate design alternatives, performing worst‑case simulation techniques to ensure robust performance across all conditions.
• Partner with Systems Engineers to negotiate specifications, effectively trading off performance versus costs versus development timescales.
• Take ownership of block development, including creating verification plans, providing production test support, and ensuring high‑quality, on‑time delivery.
• Serve as a technical resource for layout, test, and validation teams, understanding the critical impact of your block’s performance on the overall chip‑level results.
• Manage small project teams or mentor junior engineers, fostering a culture of technical excellence and "One Allegro" collaboration.

Who You Are

• Expert Designer: You hold a Bachelor’s or Master’s degree in Electrical Engineering with 5+ years of relevant experience (or 3+ years with a Master’s) in analog/mixed‑signal IC design.
• Technical Specialist: You have comprehensive knowledge of CMOS technology and an understanding of physical design for power management, including parasitics, dielectric, and junction isolation.
• Proven Problem Solver: You have a track record of applying advanced engineering principles to solve wide‑ranging assignments with a high degree of independence.
• Tool Mastery: You are a power user of industry‑standard EDA tools, specifically the Cadence chip design suite and modern simulation environments.
• Strategic Communicator: You possess excellent analytical and interpersonal skills, with the ability to influence others and present complex technical concepts clearly.
• Nice to Have: Experience leading a chip from concept to tape‑out.
• Innovative Mindset: Familiarity with or interest in using generative AI within an IC design context to improve efficiency and workflow.
• Advanced Technologies: Experience with Bipolar CMOS DMOS (BCD) and designing Gate Drive circuits for both Silicon and Gallium‑Nitride (GaN) MOSFETs.
• Automotive Excellence: Design experience for automotive ESD and safety‑critical semiconductors (ISO 26262 and ASIL compliance).
• System View: Proven ability in the translation of system‑level requirements to block‑level requirements.