Senior RTL Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING. We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

THE ROLE: As an RTL Design Engineer, you will have an outstanding opportunity to craft a functional unit in AMD. You will work as part of an experienced, skilled, and motivated engineering team with a track record of success. You will help make AMD’s ambitious future roadmap a reality while working in a highly collaborative environment at the cutting edge of technology.

THE PERSON: You approach challenges relentlessly with both critical thinking and creativity. You work as part of a team with strong communication and collaboration skills. You have a proven understanding of modern architecture and have ideas and/or drive to make it even better. Does this describe you? If so, then join us!

KEY RESPONSIBILITIES:

• Execute on RTL design and coding for various sections and related logic.
• Collaborate with a team of hardware and software engineers to define the high-level architecture.
• Participate in the definition of microarchitecture of next-generation high-performance processor cores.
• Contribute to design verification, synthesis, power reduction, timing convergence, and floorplan efforts.

PREFERRED EXPERIENCE:

• Verilog RTL development with industry tools in a CPU or GPU or SOC or ASIC environment.
• Demonstrates expertise in the following:

• Processor architecture
• Logic design
• RTL coding experience for high-speed processors
• Power-saving techniques
• Exposure to physical design and verification methods
• Awareness of synthesis, place and route, and timing closure concepts
• Development experience from clean-sheet design to product tapeout to post-silicon debug
• Proven experience with microarchitecture development, as demonstrated by patents, publications, product features
• Strong problem-solving and debugging skills

ADDITIONAL EXPERIENCE DESIRED:

• Background in synthesis flow and static timing analysis
• Knowledge of microprocessor Design-for-Test (DFT) and Design-for-Debug (DFD) logic and issues
• Experience in clocking, reset, power-up sequences and power management
• Exposure to x86 or ARM Architecture (ISA) or RISC-V or PowerPC architecture
• Comfort with scripting such as Perl, Shell and TCL

ACADEMIC CREDENTIALS:

• Master’s degree preferred with emphasis in Electrical Engineering, Computer Engineering, or Computer Science with a focus on computer architecture.