Senior Manager Physical Design Engineer in Cambridge

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture.

Are you an accomplished Physical Design leader who loves pushing the boundaries of microprocessor design? Do you get energized by optimizing Power, Performance, and Area (PPA) for cutting-edge CPU cores while growing and guiding talented engineers? AMD is hiring a Senior Manager, Physical Design to lead a critical team responsible for next-generation CPU Core implementation and signoff.

Why this role is exciting:

• Lead a high-impact team delivering large, leading-edge CPU core designs that directly influence product competitiveness.
• Work at the intersection of architecture, RTL, and silicon signoff — shaping PPA from early floorplanning through final signoff.
• Drive flow automation, mentoring, and technical excellence across geographically distributed teams.
• Opportunity to influence executive technical strategy while remaining hands-on with deep physical design challenges.

The Person

We're looking for a seasoned leader with deep expertise in Microprocessor Physical Design and advanced design techniques. You possess an unyielding commitment to achieving optimal Power, Performance, and Area (PPA) targets. This role demands exceptional people leadership and teamwork skills, as you'll be instrumental in guiding cross-geographical teams to success. Your strong analytical and problem-solving abilities will be key in collaborating with and influencing both executive-level technical experts and management to drive flawless execution.

Key Responsibilities

• Lead and manage a high-performing team of engineers dedicated to Microprocessor Physical Design implementation and signoff.
• Apply your extensive knowledge and hands-on experience in Physical Design, Timing Closure, and Signoff to deliver high-quality, on-time results for large, challenging, and leading-edge CPU Core designs.
• Mentor, coach, and foster the growth of the CPU Core Physical Design Team, emphasizing a positive influence on team morale and culture.
• Provide technical leadership and oversight across all facets of Physical Design, including:
• Full Chip Floor planning
• Clock Tree Synthesis (CTS)
• Placement and Optimization
• Routing
• Parasitic Extraction
• Static Timing Analysis (STA)
• IR/EM analysis
• Physical Verification
• Final Signoff
• Collaborate closely with RTL teams to continuously enhance PPA metrics.
• Drive flow development and automation scripting.
• Utilize strong technical problem-solving and debugging skills to overcome complex design challenges.

Preferred Experience

• Hands-on experience in SoC Physical Design implementation, signoff, and TapeOut.
• Proven leadership experience managing Physical Design teams of 10+ members.
• Exceptional analytical and problem-solving skills, coupled with meticulous attention to detail.
• Strong communication skills (written, verbal, and presentation) and excellent time management.
• Proficiency with industry-standard EDA tools for Physical Design and Signoff flows, such as: Synopsys Fusion Compiler, PrimeTime, StarRC, Cadence Innovus, Mentor Graphics Calibre, Apache Redhawk.
• Demonstrated experience leading technical teams through complex design cycles.
• Background in high-speed microprocessor designs.
• Familiarity with current sub-micron technologies.
• Solid understanding of Physical Design tools and flows, or custom circuit design.

Education

Bachelor's or Master's Degree in Electrical Engineering, Computer Engineering, or a related field.