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- Tasks: Lead formal verification for complex GFXIP blocks and enhance verification quality.
- Company: Join AMD, a leader in next-gen computing and innovation.
- Benefits: Enjoy competitive pay, hybrid work, and great career growth opportunities.
- Why this job: Make a real impact in AI and tech while collaborating with top talent.
- Qualifications: 2-4 years in digital design/verification and strong problem-solving skills.
- Other info: Inclusive culture that values diverse perspectives and encourages learning.
The predicted salary is between 36000 - 60000 £ per year.
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you will discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE: AMD is seeking a Senior Formal Verification Engineer to own formal verification for complex GFXIP blocks and contribute to subsystem sign-off in partnership with FV tech leads. You will work closely with design and architecture to translate specifications into robust properties, improve convergence, and raise verification quality for high-impact blocks.
THE PERSON:
- Self-directed engineer who can own a complex block's formal plan, make sound technical decisions, and drive closure with limited supervision.
- Clear communicator who conveys status, risks, and recommendations to cross-functional partners.
- Analytical problem-solver skilled at tackling difficult convergence and debug challenges.
- Collaborative team player who supports peers and shares reusable assets and best practices.
KEY RESPONSIBILITIES:
- Own formal verification plans and execution for one or more complex GFXIP blocks; support subsystem sign-off with guidance from FV tech leads.
- Develop properties and constraints from architectural/design specs; partner with designers to clarify intent and improve verifiability.
- Build and maintain high-quality formal testbenches and assertion suites; ensure property soundness, non-vacuity, and constraint hygiene.
- Apply advanced formal techniques (abstraction, cutpoints, invariants, assume-guarantee, cone-of-influence reduction) to improve convergence and throughput.
- Drive closure on formal quality metrics for assigned blocks: proof convergence, property completeness, functional/code coverage; contribute to app-based checks (connectivity, CDC/RDC, X-prop) and equivalence checking as needed.
- Debug counterexamples efficiently; provide actionable feedback and collaborate on RTL/design fixes; prevent regressions through reviews and targeted automation.
- Contribute to methodology and automation via reusable assertion libraries, scripts, checklists, and CI integrations; share learnings across the team.
- Provide guidance to junior engineers through reviews, pairing, and knowledge sharing.
- Document verification plans, assumptions, findings, and lessons learned; provide clear status updates and risk/mitigation plans to stakeholders.
PREFERRED EXPERIENCE:
- Digital design/verification with 2–4+ years focused on formal verification.
- Proven ownership of formal verification for complex blocks in GPU/CPU or high-performance IP; contribution to subsystem-level sign-off.
- Proficiency with formal tools: Cadence JasperGold, Synopsys VC Formal; familiarity with SEC and formal apps (connectivity, CDC/RDC, X-prop, deadlock/liveness).
- Strong SystemVerilog Assertions (SVA) skills; experience deriving properties from specs and building reusable assertion frameworks.
- Hands-on convergence techniques and counterexample debug; experience with abstraction/invariants/assume-guarantee.
- Scripting skills (Python, TCL); experience with automation and CI to scale formal runs and metrics.
- Solid understanding of processor/GPU microarchitecture, memory systems, interfaces, and power/clock/reset domains.
ACADEMIC CREDENTIALS: Bachelors or Masters degree in Computer Engineering/Electrical Engineering.
LOCATION: Cambridge, United Kingdom (Hybrid).
Formal Verification Engineer in Cambourne employer: Advanced Micro Devices, Inc
Contact Detail:
Advanced Micro Devices, Inc Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Formal Verification Engineer in Cambourne
✨Tip Number 1
Network like a pro! Reach out to folks in the industry, attend meetups, and connect with current AMD employees on LinkedIn. A personal introduction can make all the difference when it comes to landing that interview.
✨Tip Number 2
Prepare for those technical interviews by brushing up on your formal verification skills. Dive into advanced techniques and be ready to discuss your experience with tools like Cadence JasperGold and Synopsys VC Formal. Show them you know your stuff!
✨Tip Number 3
Don’t just wait for job postings—be proactive! Check out our website regularly and apply directly. Tailor your application to highlight your experience with GFXIP blocks and subsystem sign-off; it’ll show you’re genuinely interested.
✨Tip Number 4
Follow up after interviews! A quick thank-you email can keep you top of mind. Mention something specific from your conversation to remind them why you’re the perfect fit for the Senior Formal Verification Engineer role.
We think you need these skills to ace Formal Verification Engineer in Cambourne
Some tips for your application 🫡
Tailor Your Application: Make sure to customise your CV and cover letter for the Formal Verification Engineer role. Highlight your experience with formal verification, especially in GPU/CPU blocks, and show how your skills align with AMD's mission.
Showcase Your Technical Skills: Don’t hold back on showcasing your technical prowess! Mention your proficiency with tools like Cadence JasperGold and Synopsys VC Formal, as well as your scripting skills in Python or TCL. This is your chance to shine!
Communicate Clearly: Since clear communication is key, ensure your application reflects this. Use straightforward language to convey your experiences and how you’ve tackled complex problems. Remember, we want to see how you can communicate effectively with cross-functional teams.
Apply Through Our Website: We encourage you to apply directly through our website. It’s the best way to ensure your application gets the attention it deserves. Plus, it shows you’re serious about joining our innovative team at AMD!
How to prepare for a job interview at Advanced Micro Devices, Inc
✨Know Your Stuff
Make sure you’re well-versed in formal verification techniques and tools like Cadence JasperGold and Synopsys VC Formal. Brush up on your SystemVerilog Assertions (SVA) skills and be ready to discuss how you've applied advanced techniques in past projects.
✨Show Your Problem-Solving Skills
Prepare to tackle some tricky convergence and debug challenges during the interview. Think of examples from your experience where you successfully debugged counterexamples or improved verification quality, and be ready to share your thought process.
✨Communicate Clearly
As a clear communicator, you’ll need to convey status, risks, and recommendations effectively. Practice explaining complex technical concepts in simple terms, as you might have to collaborate with cross-functional partners who may not have a deep technical background.
✨Be a Team Player
AMD values collaboration, so be prepared to discuss how you’ve supported peers and shared best practices in previous roles. Highlight any experiences where you guided junior engineers or contributed to team methodologies and automation efforts.
