At a Glance
- Tasks: Design revolutionary tech for global 5G satellite communications and collaborate with top engineers.
- Company: AccelerComm, a leader in cutting-edge non-terrestrial communication technology.
- Benefits: Competitive salary, flexible working options, and opportunities for professional growth.
- Other info: Dynamic team environment with a focus on innovation and collaboration.
- Why this job: Join us to shape the future of mobile standards and make a global impact.
- Qualifications: Expertise in RTL languages and experience with ASIC/FPGA design required.
The predicted salary is between 60000 - 80000 £ per year.
You will work on revolutionary technology that is at the leading edge of non-terrestrial communications, a 5G base station to be deployed on board satellites. This technology will underpin the next generation of mobile standards, giving complete coverage to the entire globe. AccelerComm develops the baseband signal processing technology, using hardware acceleration to generate world-leading error resilience, capacity and power efficiency. You will work on the latest generation space-qualified devices, delivering standalone IP and integrated IP solutions.
Key Responsibilities
- Work closely with the Algorithm and System Architecture teams to understand requirements and translate them into micro-architectures for RTL implementations.
- Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of appropriate testbenches.
- Deploy your designs onto the latest FPGA development platforms for validation and system integration.
- Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product.
- Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGA.
Skills, Knowledge & Expertise
Essential:
- Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products.
- A strong skillset in delivering digital designs in the ASIC and FPGA industry.
- Optimisation of timing and hardware resources for high throughput data or signal processing applications.
- Experience in power management techniques, synthesis and timing analysis.
- Track record in collaborating across teams to produce integrated solutions.
- Experience in technical documentation writing – design specifications, user guides, verification plans.
- Expert user of EDA tools for simulation and synthesis.
Desirable:
- Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming).
- Familiarity with the AMBA bus protocols.
- Understanding of UVM verification techniques or practical experience using UVM for IP verification.
- Experience using C++/SystemC for design modelling and integration.
- Experience with high speed interfaces such as PCI-E or JESD.
- Knowledge of a scripting language, such as Python.
- Knowledge and appreciation of project methodologies across the design lifecycle, including agile and waterfall, requirement capture and traceability.
- Experience with AMD FPGAs and the associated design tools or with any EDA’s ASIC backend tools.
Senior Design Engineer in Southampton employer: AccelerComm
As a Defence Systems Engineer at our innovative company, you will be part of a dynamic team dedicated to advancing cutting-edge EO/IR technologies. We pride ourselves on fostering a collaborative work culture that encourages professional growth and development, offering numerous opportunities for skill enhancement and career progression. Located in a vibrant area, our workplace not only provides a stimulating environment but also unique advantages such as access to industry-leading resources and a commitment to employee well-being.
