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For Companies At a Glance
- Tasks: Design cutting-edge satellite communication technology and collaborate with teams to implement innovative solutions.
- Company: Join AccelerComm, a leader in satellite communications and 5G technology development.
- Benefits: Enjoy a permanent role with opportunities for professional growth and collaboration on groundbreaking projects.
- Why this job: Be part of a revolutionary team shaping the future of global mobile standards and technology.
- Qualifications: Expertise in RTL languages, digital design, and experience with ASIC/FPGA products required.
- Other info: Work in a dynamic environment with a focus on efficiency and quality improvements.
The predicted salary is between 48000 - 72000 £ per year.
You will work on revolutionary technology that is at the leading edge of satellite communications, a 5G base station to be deployed on board satellite. This technology will underpin the next generation of mobile standards giving complete coverage to the globe. AccelerComm develop the base band signal processing technology, using hardware acceleration to generate world leading power efficiency.
You will work on the latest generation space qualified devices, delivering standalone IP, and IP integration, with potential to explore implementation on AI Engines.
Key Responsibilities- Work closely with the Algorithm team to understand requirements and translate them into architectures for RTL implementations.
- Implement designs targeting both FPGA and ASIC using industry standard techniques, including the creation of UVM based testbenches.
- Deploy your designs onto the latest FPGA development platforms for validation and system integration.
- Actively engage with and adhere to AccelerComm engineering methodology, processes and design techniques, being able to offer improvements to efficiency and quality for both the design flow and the final product.
- Collaborate with colleagues across the whole design flow: micro-architecture, design, verification, physical implementation and optimisation for ASIC and FPGAs.
Essential:
- Expert knowledge of an RTL language (Verilog, SystemVerilog) for complex ASIC/FPGA products.
- A strong skillset in delivering digital designs in the ASIC and FPGA industry.
- Optimisation of timing and hardware resources for high throughput data or signal processing applications.
- Experience in power management techniques, synthesis and timing analysis.
- Track record in collaborating across teams to produce integrated solutions.
- Experience in technical documentation writing – design specifications, user guides, verification plans.
- Expert user of EDA tools for simulation and synthesis.
Desirable:
- Knowledge of communications signal processing algorithms (such as error correction, equalisation, channel estimation, beamforming).
- Familiar with the AMBA bus protocol.
- Understanding of UVM verification techniques or practical experience using UVM for IP verification.
- Experience using C++/SystemC for design modelling and integration.
- Knowledge of a scripting language, such as Python.
- Knowledge and appreciation of project methodologies across the design lifecycle, including agile and waterfall, requirement capture and traceability.
- Experience with AMD FPGAs and the associated design tools or with any EDA's ASIC backend tools.
Contact Detail:
AccelerComm Ltd Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior Design Engineer (0093) Southampton, UK (Southampton)
✨Tip Number 1
Familiarise yourself with the latest trends in satellite communications and 5G technology. Understanding the current landscape will not only help you during interviews but also demonstrate your genuine interest in the field.
✨Tip Number 2
Network with professionals in the hardware design and satellite communications sectors. Attend industry events or join relevant online forums to connect with potential colleagues and learn more about the company culture at AccelerComm.
✨Tip Number 3
Brush up on your knowledge of RTL languages, particularly Verilog and SystemVerilog. Being able to discuss your experience and understanding of these languages confidently can set you apart from other candidates.
✨Tip Number 4
Prepare to discuss your previous projects that involved FPGA and ASIC design. Be ready to explain your role, the challenges you faced, and how you collaborated with other teams to deliver successful outcomes.
We think you need these skills to ace Senior Design Engineer (0093) Southampton, UK (Southampton)
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your expertise in RTL languages, FPGA and ASIC design, and any relevant experience with digital designs. Use specific examples that demonstrate your skills in power management techniques and collaboration across teams.
Craft a Compelling Cover Letter: In your cover letter, express your enthusiasm for working on revolutionary satellite communication technology. Mention how your background aligns with the key responsibilities of the role and your understanding of the latest generation space qualified devices.
Showcase Technical Documentation Skills: Since technical documentation writing is essential for this role, include examples of design specifications, user guides, or verification plans you have created in the past. This will demonstrate your ability to communicate complex ideas clearly.
Highlight Collaborative Experience: Emphasise your track record of collaborating with different teams throughout the design flow. Provide specific instances where your contributions led to integrated solutions, showcasing your teamwork and problem-solving skills.
How to prepare for a job interview at AccelerComm Ltd
✨Showcase Your Technical Expertise
Be prepared to discuss your experience with RTL languages like Verilog or SystemVerilog. Highlight specific projects where you've implemented designs for ASIC or FPGA, and be ready to explain the challenges you faced and how you overcame them.
✨Demonstrate Collaboration Skills
Since the role involves working closely with various teams, share examples of past collaborations. Discuss how you communicated with algorithm teams or other departments to ensure successful project outcomes, emphasising your ability to integrate solutions.
✨Discuss Optimisation Techniques
Talk about your experience in optimising timing and hardware resources. Provide concrete examples of how you've improved throughput in signal processing applications, and mention any power management techniques you've successfully implemented.
✨Prepare for Technical Questions
Expect technical questions related to EDA tools, UVM verification techniques, and communications signal processing algorithms. Brush up on these topics and be ready to explain your understanding and practical experience with them.
