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For Companies At a Glance
- Tasks: Design and develop cutting-edge electronic systems and PCB assemblies.
- Company: Join a dynamic engineering team in Dundee, UK, focused on innovative media handling solutions.
- Benefits: Enjoy a collaborative work environment with opportunities for mentorship and professional growth.
- Why this job: Be part of exciting projects that push the boundaries of technology and make a real impact.
- Qualifications: Must have a degree and over 10 years of experience in MCU/FPGA product development.
- Other info: Experience with Cadence Allegro and Altium is a plus, but not essential.
The predicted salary is between 48000 - 72000 £ per year.
Senior Electronic Design Engineer
On-site Dundee, UK based
POSITION SUMMARY & KEY AREAS OF RESPONSIBILITY
An opportunity has arisen in the Engineering organisation for a Senior Electronic/FPGA Engineer in the Media Handling team.
Main responsibilities shall include, but will not be restricted to:
- Design, develop, test embedded microprocessor, microcontroller, and FPGA based PCB assemblies
- Design, develop and document electronic modules and systems
- Digital and Analogue electronics design
- Schematic capture (Cadence Allegro experience preferred but not essential)
- Create test specifications and reports
- Soldering proficiency with SMT components
- Debug hardware to component level
- Hardware unit test, and supporting integration and systems testing
- Provide estimates of effort, schedule, and size of change to Project Manager
- Regular progress reporting on schedule, quality & size of change
- Support for existing devices through problem investigation, identification, and resolution
- Mentoring Junior Engineers.
Basic Qualifications/Experience
- Degree qualified
- >10 years experience developing MCU and/or FPGA based products
- Analogue and Digital Design knowledge
- FPGA (Verilog/VHDL) design knowledge
- Developing and utilising test benches for comprehensive verification of FPGA designs.
- A proven track record of designing for Xilinx, Intel or Lattice devices and mastery of associated tool chains.
- Completed a significant number of complex FPGA designs using Xilinx, Intel or Lattice FPGA devices and have knowledge of the trends in FPGA design and technology.
- USB Devices
- Design for EMC compliance
- Ability to work on several projects simultaneously
Additional Qualifications/Experience (preferred but not essential)
- Cadence Allegro experience
- Altium designer experience
- Stepper and DC motor control
- USB Compliance
- Experience with high-speed interfaces (e.g., DDR, LVDS)
- Software Development
Sr Electronics Design Engineer employer: NCR Atleos
Contact Detail:
NCR Atleos Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Sr Electronics Design Engineer
✨Tip Number 1
Network with professionals in the electronics design field, especially those who have experience with FPGA and MCU products. Attend industry meetups or online webinars to connect with potential colleagues and learn about the latest trends.
✨Tip Number 2
Showcase your hands-on experience with FPGA design tools like Xilinx or Intel in conversations. Be prepared to discuss specific projects where you’ve successfully implemented these technologies, as this will demonstrate your expertise.
✨Tip Number 3
Prepare to discuss your approach to debugging hardware at the component level. Having a clear methodology and examples of past challenges you've overcome will impress interviewers and show your problem-solving skills.
✨Tip Number 4
If you have experience mentoring junior engineers, be ready to share specific instances where you guided them through complex projects. This will highlight your leadership abilities and your commitment to team development.
We think you need these skills to ace Sr Electronics Design Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience with MCU and FPGA based products, as well as your knowledge in both analogue and digital design. Use specific examples from your past work that align with the responsibilities listed in the job description.
Craft a Strong Cover Letter: In your cover letter, emphasise your 10+ years of experience and any relevant projects you've completed. Mention your proficiency in FPGA design and your familiarity with tools like Xilinx, Intel, or Lattice, as these are crucial for the role.
Showcase Relevant Skills: Highlight your skills in schematic capture, soldering proficiency, and debugging hardware. If you have experience with Cadence Allegro or Altium designer, make sure to include that as well, as it will strengthen your application.
Prepare for Technical Questions: Be ready to discuss your previous projects in detail, especially those involving FPGA designs and compliance with USB and EMC standards. This will demonstrate your expertise and readiness for the challenges of the role.
How to prepare for a job interview at NCR Atleos
✨Showcase Your Technical Expertise
Be prepared to discuss your experience with embedded microprocessors, microcontrollers, and FPGA design. Highlight specific projects where you've successfully designed and developed PCB assemblies, and be ready to explain your approach to both digital and analogue electronics.
✨Demonstrate Problem-Solving Skills
Expect questions that assess your ability to debug hardware and resolve issues at the component level. Share examples of past challenges you've faced in hardware unit testing and how you approached problem investigation and resolution.
✨Familiarise Yourself with Relevant Tools
While Cadence Allegro experience is preferred, showing familiarity with other design tools like Altium Designer can be beneficial. Be ready to discuss your proficiency with these tools and how they have aided your design process in previous roles.
✨Emphasise Mentorship Experience
Since mentoring junior engineers is part of the role, be prepared to talk about your experience in guiding less experienced team members. Share specific instances where you've provided support or training, and how it contributed to the team's success.
