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- Tasks: Join us as a Physical Design Engineer, working on cutting-edge chip designs and tapeouts.
- Company: Be part of an innovative tech company pushing the boundaries of semiconductor technology.
- Benefits: Enjoy flexible work options, competitive pay, and opportunities for professional growth.
- Why this job: Dive into a dynamic role with impactful projects in a collaborative and forward-thinking environment.
- Qualifications: Experience with EDA tools like Synopsys ICC/ICC2 or Cadence Innovus is essential.
- Other info: Work on advanced nodes down to 7nm and contribute to high-performance designs.
The predicted salary is between 48000 - 72000 £ per year.
RESPONSIBILITIES:
Netlist to GDSII at block level, Subsystem Level and at Full chip.
• Worked on multiple tapeouts on Netlist to GDSII
• Hierarchical partitioning and budgeting of block-level subsystems.
• Implementation of high performance (HP) cores, low power designs
• Node experience upto 7nm, 10nm, 14nm, 28nm.
• Timing Signoff in loop through STA and ECO cycle at block and at interface.
• Block level floor planning, power planning and IR drop analysis.
• Scan chain reordering / Scan Chain repartitioning
• CTS expertise and clock tree constraints creation for meeting specifications
• MMMC optimization at Block and Sub-System Level
• Timing closure with Crosstalk and AOCV / POCV
• TCL scripting to fundamentally understand tool usage.
MANDATORY EDA SKILLS
• PnR tools such as Synopsys ICC/ICC2 and/or Cadence Innovus
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Physical Design Engineer employer: SVENTL ASIA PACIFIC PTE. LTD.
Contact Detail:
SVENTL ASIA PACIFIC PTE. LTD. Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Physical Design Engineer
✨Tip Number 1
Make sure to showcase your experience with EDA tools like Synopsys ICC/ICC2 and Cadence Innovus during networking opportunities. Engaging in discussions about these tools can help you connect with industry professionals who may have insights or referrals for openings.
✨Tip Number 2
Attend industry conferences and workshops focused on physical design engineering. These events are great for meeting potential employers and learning about the latest trends, which can give you an edge when discussing your skills and experiences.
✨Tip Number 3
Join online forums and communities related to physical design engineering. Engaging in conversations and sharing your knowledge can help you build a network that might lead to job opportunities at companies like us.
✨Tip Number 4
Consider reaching out to current or former employees of StudySmarter on platforms like LinkedIn. A friendly message expressing your interest in the Physical Design Engineer role can sometimes lead to valuable insights or even a referral.
We think you need these skills to ace Physical Design Engineer
Some tips for your application 🫡
Understand the Role: Familiarise yourself with the responsibilities of a Physical Design Engineer. Highlight your experience with netlist to GDSII conversions, tapeouts, and any relevant node experience in your application.
Tailor Your CV: Make sure your CV reflects your skills in EDA tools like Synopsys ICC/ICC2 and Cadence Innovus. Include specific projects where you implemented high-performance cores or worked on timing signoff.
Craft a Strong Cover Letter: In your cover letter, discuss your experience with hierarchical partitioning, floor planning, and power planning. Mention any successful projects that demonstrate your ability to meet specifications and achieve timing closure.
Showcase Technical Skills: Emphasise your proficiency in TCL scripting and any other relevant technical skills. Provide examples of how you've used these skills to optimise designs or improve processes in previous roles.
How to prepare for a job interview at SVENTL ASIA PACIFIC PTE. LTD.
✨Showcase Your Technical Skills
Be prepared to discuss your experience with EDA tools like Synopsys ICC/ICC2 and Cadence Innovus. Highlight specific projects where you successfully managed the netlist to GDSII process, as well as any challenges you faced and how you overcame them.
✨Demonstrate Problem-Solving Abilities
Expect questions that assess your problem-solving skills, especially regarding timing signoff and crosstalk issues. Prepare examples of how you've handled timing closure and MMMC optimisation in previous roles.
✨Discuss Your Experience with Different Nodes
Make sure to mention your experience with various technology nodes, particularly 7nm, 10nm, 14nm, and 28nm. Be ready to explain how design considerations change across these nodes and how you've adapted your strategies accordingly.
✨Prepare for Scenario-Based Questions
Interviewers may present hypothetical scenarios related to block-level floor planning or power planning. Practice articulating your thought process and decision-making steps in these situations to demonstrate your expertise and analytical skills.
