Digital Design Engineer - Verification
Digital Design Engineer - Verification

Digital Design Engineer - Verification

Full-Time 43200 - 72000 ÂŁ / year (est.) No home office possible
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At a Glance

  • Tasks: Design and verify high-performance ASICs for cutting-edge AI applications.
  • Company: Join Flux Computing, a leader in optical processors for AI model training.
  • Benefits: Enjoy competitive salary, stock options, healthcare, and 25 days PTO.
  • Why this job: Be part of an innovative team shaping the future of computing in a vibrant London office.
  • Qualifications: 3+ years in ASIC design/verification with expertise in SystemVerilog and UVM.
  • Other info: Live within a 45-minute commute to our Kings Cross HQ for collaboration.

The predicted salary is between 43200 - 72000 ÂŁ per year.

Company Overview

Flux Computing designs and manufactures optical processors to train and run inference on large AI models. Join us in London to be part of a highly motivated and skilled team that thrives on delivering impact and innovation at speed.

The role

We’re searching for a Digital Design Engineer who is passionate about building and verifying complex, high‑performance ASICs. You will own the definition and execution of verification strategies for the digital subsystems that control, configure and monitor Flux’s optical datapaths and AI compute fabrics. Your work will ensure first‑silicon success and robust, production‑worthy silicon that scales to data‑centre volumes.

Responsibilities

  • Architect, implement and maintain comprehensive verification environments (SystemVerilog + UVM, assertion‑based and formal) for datapath, control, memory and high‑speed I/O blocks in our OTPU.
  • Define verification plans that target functional correctness, low‑power modes, safety, reliability and security requirements; derive and track coverage metrics to closure.
  • Develop reusable VIP and stimulus generators for modules such as network‑on‑chip routers, DDR/LPDDR controllers, PCIe/CXL interfaces and proprietary photonic control logic.
  • Collaborate closely with RTL designers to iterate on micro‑architectures, resolve corner‑case bugs and balance PPA (power, performance, area) trade‑offs uncovered during verification.
  • Drive RTL quality → GDS sign‑off: run lint, CDC/RDC, SDC constraint validation, gate‑level simulations, GLS with SDF, and power‑aware checks; work with physical‑design teams on ECOs.
  • Enable post‑silicon bring‑up by generating test vectors, configuring scan/DFT hooks, and supporting FPGA/emulation platforms for firmware and software teams.
  • Mentor junior engineers on verification methodology, code reviews, and best practices; champion continuous‐integration flows, regressions and results dashboards.
  • Track industry advances in formal verification, emulation, coverage‑driven flows, RISC‑V vectors, and AI‑centric design techniques to keep Flux at the forefront of silicon quality.

Skills & Experience

  • 3+ years in digital ASIC/SoC design & verification, with at least two tape‑outs.
  • Mastery of SystemVerilog/UVM, functional coverage, constraint‑random stimulus and scoreboards.
  • Deep understanding of clock‑domain crossing, reset and power‑domain management, DFT/scan and low‑power (UPF/CPF) methodologies.
  • Strong scripting (Python, Tcl, shell) to automate regressions and data analysis.
  • Proven debug skills across RTL, gate‑level and emulation environments.

Compensation & Benefits

  • Competitive salary and stock options in a rapidly growing AI company.
  • Based in our new 5,000 sq. ft. office in the AI hub of Kings Cross, London.
  • To foster collaboration in our high-growth environment, we require all employees to work from our London HQ and live within a 45-minute commute. We offer an extra ÂŁ24,000/year incentive for those living within 20 minutes.
  • Comprehensive healthcare insurance.
  • 25 days PTO policy plus bank holidays.
  • Private access to our in-house 3D printer.

If you are passionate about pushing the boundaries of what’s possible in AI and thrive in a high-energy, fast-paced environment, we want to hear from you. Apply now to join Flux and be a key player in shaping the future of computing.

Digital Design Engineer - Verification employer: Flux Computing

At Flux Computing, we pride ourselves on being an exceptional employer that fosters innovation and collaboration in the heart of London's AI hub. Our dynamic work culture encourages personal and professional growth, offering competitive salaries, stock options, and comprehensive healthcare benefits, alongside a generous PTO policy. Join us to be part of a passionate team dedicated to pushing the boundaries of AI technology while enjoying unique perks like private access to our in-house 3D printer.
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Contact Detail:

Flux Computing Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Digital Design Engineer - Verification

✨Tip Number 1

Familiarise yourself with the latest trends in digital design and verification, especially in SystemVerilog and UVM. Being able to discuss recent advancements or techniques during your interview can demonstrate your passion and commitment to the field.

✨Tip Number 2

Network with professionals in the ASIC design community, particularly those who have experience in verification. Attend relevant meetups or online forums where you can share insights and learn from others, which could give you an edge in understanding industry expectations.

✨Tip Number 3

Prepare to discuss specific projects where you've implemented verification strategies. Be ready to explain your role, the challenges you faced, and how you overcame them, as this will showcase your hands-on experience and problem-solving skills.

✨Tip Number 4

Research Flux Computing's products and their applications in AI. Understanding their technology and how your skills can contribute to their goals will help you tailor your conversation and show that you're genuinely interested in being part of their team.

We think you need these skills to ace Digital Design Engineer - Verification

Digital ASIC/SoC Design
Verification Methodologies
SystemVerilog
UVM (Universal Verification Methodology)
Functional Coverage
Constraint-Random Stimulus
Scoreboards
Clock-Domain Crossing
Reset and Power-Domain Management
DFT/Scan Techniques
Low-Power Methodologies (UPF/CPF)
Scripting Skills (Python, Tcl, Shell)
Debugging Skills (RTL, Gate-Level, Emulation)
Test Vector Generation
Collaboration with RTL Designers
Continuous Integration Flows
Mentoring Junior Engineers

Some tips for your application 🫡

Tailor Your CV: Make sure your CV highlights relevant experience in digital ASIC/SoC design and verification. Emphasise your mastery of SystemVerilog/UVM and any specific projects that demonstrate your skills in building and verifying complex systems.

Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for AI and your understanding of the role. Mention specific experiences that align with the responsibilities outlined in the job description, such as your work with verification environments or collaboration with RTL designers.

Showcase Your Skills: In your application, include examples of your scripting abilities (Python, Tcl, shell) and how you've used them to automate processes or improve efficiency in previous roles. This will demonstrate your technical proficiency and problem-solving skills.

Highlight Continuous Learning: Mention any recent advancements or techniques in formal verification, emulation, or AI-centric design that you are familiar with. This shows your commitment to staying at the forefront of the industry and aligns with Flux's goal of maintaining high silicon quality.

How to prepare for a job interview at Flux Computing

✨Showcase Your Technical Skills

Be prepared to discuss your experience with SystemVerilog and UVM in detail. Highlight specific projects where you implemented verification environments and how you tackled challenges related to functional correctness and low-power modes.

✨Demonstrate Problem-Solving Abilities

Expect to face technical questions that assess your debugging skills across RTL, gate-level, and emulation environments. Prepare examples of corner-case bugs you've resolved and how you balanced power, performance, and area trade-offs.

✨Emphasise Collaboration

Since the role involves working closely with RTL designers, be ready to discuss your collaborative experiences. Share instances where you iterated on micro-architectures or mentored junior engineers, showcasing your ability to work in a team.

✨Stay Updated on Industry Trends

Research recent advances in formal verification, emulation, and AI-centric design techniques. Being knowledgeable about these topics will demonstrate your commitment to keeping Flux at the forefront of silicon quality and innovation.

Digital Design Engineer - Verification
Flux Computing
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