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- Tasks: Join an international team to design high-performance FPGA solutions.
- Company: Innovative tech company focused on low latency and parallel processing technologies.
- Benefits: Enjoy hybrid working options and a collaborative work environment.
- Why this job: Be part of cutting-edge projects that impact network performance and data throughput.
- Qualifications: Degree in electronics or related field; experience with RTL in SystemVerilog, Verilog, or VHDL.
- Other info: Open to candidates with varied backgrounds; we value your interest!
The predicted salary is between 43200 - 72000 £ per year.
This is a senior engineering role based in Cambridge, UK, working as part of an international team of software and hardware design engineers. The company’s focus is in high-performance, low latency technologies, with an interest in parallel processing, algorithmic efficiency, data throughput, and network performance.
You’d work alongside senior software engineers in Cambridge, and fellow hardware engineers in Europe. As the team grows, more peers in hardware would join you in the UK office.
Your CV will show your:
- Good degree in electronics or another technical subject from a top university
- Extensive experience developing complex and well-structured RTL in SystemVerilog, Verilog or VHDL, with particular attention to design approach and performance constraints
As a skilled FPGA Design Engineer you will also have, as your CV demonstrates:
- A strong understanding of digital logic, synchronous design, and hardware architecture
- Good experience with Xilinx and/or Intel (Altera) FPGAs and relevant tools
- Digital design and verification flow experience, from micro-architectures’ definition through to RTL development, creation of test benches, simulation, synthesis, place and route, timing analysis and emulation.
- Excellent analytical thinking, problem-solving and troubleshooting skills with an aptitude to resolve complex issues.
- Additional experience with Python scripting, multi clock, cross clock domain and/or asynchronous execution and/or PHY networking is beneficial.
This is a Cambridge, UK-based position offering hybrid working options, and requiring full existing work permission without sponsorship.
Please note: even if you don’t have exactly the background indicated, do contact us now if this type of job is of interest – we may well have similar opportunities that you would be suited to. And of course, we always get your permission before submitting your CV to a company.
Senior FPGA Design Engineer employer: ECM Selection
Contact Detail:
ECM Selection Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior FPGA Design Engineer
✨Tip Number 1
Network with professionals in the FPGA and hardware design community. Attend industry conferences, webinars, or local meetups to connect with potential colleagues and learn about the latest trends in high-performance technologies.
✨Tip Number 2
Showcase your hands-on experience with Xilinx and Intel FPGAs by discussing specific projects you've worked on. Be prepared to explain your design approach and how you tackled performance constraints during these projects.
✨Tip Number 3
Brush up on your knowledge of digital logic and synchronous design principles. Being able to articulate complex concepts clearly will demonstrate your expertise and help you stand out during discussions with our engineering team.
✨Tip Number 4
Familiarise yourself with Python scripting and its applications in FPGA design. Highlight any relevant experience you have with multi-clock domains or asynchronous execution, as this could give you an edge in the selection process.
We think you need these skills to ace Senior FPGA Design Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your degree in electronics or a related technical field, and emphasise your extensive experience with RTL development in SystemVerilog, Verilog, or VHDL. Focus on your design approach and performance constraints to align with the company's needs.
Showcase Relevant Experience: Detail your experience with Xilinx and/or Intel (Altera) FPGAs, including the tools you've used. Include specific examples of your digital design and verification flow experience, from micro-architecture definition to timing analysis and emulation.
Highlight Problem-Solving Skills: Demonstrate your analytical thinking and troubleshooting skills in your application. Provide examples of complex issues you've resolved, particularly in relation to digital logic and synchronous design.
Express Interest in the Role: In your cover letter, express your enthusiasm for the position and the opportunity to work in a collaborative international team. Mention any additional skills, such as Python scripting or experience with asynchronous execution, that could set you apart.
How to prepare for a job interview at ECM Selection
✨Showcase Your Technical Expertise
Be prepared to discuss your experience with RTL development in SystemVerilog, Verilog, or VHDL. Highlight specific projects where you tackled performance constraints and how your design approach contributed to the success of those projects.
✨Demonstrate Problem-Solving Skills
Expect technical questions that assess your analytical thinking and troubleshooting abilities. Prepare examples of complex issues you've resolved in past roles, particularly those related to digital logic and hardware architecture.
✨Familiarise Yourself with Relevant Tools
Make sure you are well-versed in the tools associated with Xilinx and/or Intel (Altera) FPGAs. Be ready to discuss your experience with the digital design and verification flow, including simulation and timing analysis.
✨Emphasise Team Collaboration
Since this role involves working with an international team, be prepared to talk about your experience collaborating with software engineers and other hardware engineers. Share examples of how you’ve successfully worked in a team environment to achieve project goals.
