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For Companies At a Glance
- Tasks: Design and optimise high-performance digital systems for space-based 5G communications.
- Company: Join a cutting-edge deep-tech firm revolutionising satellite communications.
- Benefits: Enjoy competitive salary, equity, pension, private medical, and hybrid work options.
- Why this job: Work on groundbreaking technology with a collaborative team making a real-world impact.
- Qualifications: Expertise in RTL design, Verilog/SystemVerilog, and experience in high-throughput hardware development required.
- Other info: Ideal for those passionate about 5G and space technology.
The predicted salary is between 43200 - 72000 £ per year.
A high-growth deep-tech company developing next-generation satellite communications technology is looking to expand its hardware team. Their mission is to enable truly global mobile coverage by deploying 5G base stations directly on board satellites. Using cutting-edge hardware acceleration and proprietary signal processing IP, they are solving some of the most technically challenging problems in wireless communications.
They are now seeking a Senior FPGA Design Engineer to join the team responsible for delivering complex, high-performance digital designs targeting both FPGA and ASIC. This is a hands-on role with a strong focus on RTL development, design optimisation, and system-level integration for advanced communications systems operating in space.
The ideal candidate will have deep experience in RTL design and a background in high-throughput, low-power hardware development. This is a collaborative environment where engineers work across the full development flow, and where technical ownership is both expected and supported.
What they’re looking for:
- Proven expertise in RTL design using Verilog or SystemVerilog for complex FPGA or ASIC systems
- Strong grasp of synthesis, timing closure, and resource optimisation for high-speed signal processing applications
- Experience developing and integrating IP in multi-block hardware systems
- Familiarity with UVM verification methodologies and testbench development
- Skilled in simulation, lab-based validation, and system integration using industry-standard tools
- Ability to collaborate across design, verification, and algorithm teams
- Strong documentation and communication skills
Desirable skills include:
- Knowledge of communications signal processing algorithms (e.g. error correction, equalisation, beamforming)
- Experience with AMBA protocols, Python scripting, or C++/SystemC modelling
- Exposure to AMD/Xilinx FPGA toolchains or ASIC backend flows
- Understanding of project lifecycles including agile or V-model methodologies
Why consider this opportunity?
- Work on industry-defining technology at the intersection of 5G and space
- Join a high-calibre team with a collaborative, problem-solving mindset
- Contribute to complex digital designs with real-world impact
- Competitive salary, meaningful equity, and strong benefits package
- Hybrid working and a supportive, engineering-led culture
Interested? Please apply with your CV or get in touch for a confidential discussion about the role.
Senior FPGA Design Engineer employer: Yoh, A Day & Zimmermann Company
Contact Detail:
Yoh, A Day & Zimmermann Company Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Senior FPGA Design Engineer
✨Tip Number 1
Familiarise yourself with the latest advancements in FPGA and ASIC design, particularly in the context of satellite communications. This will not only enhance your technical knowledge but also demonstrate your genuine interest in the field during discussions.
✨Tip Number 2
Network with professionals in the space and telecommunications sectors. Attend relevant conferences or webinars to connect with industry experts, which can provide insights into the company’s culture and expectations.
✨Tip Number 3
Prepare to discuss specific projects where you've successfully implemented RTL design using Verilog or SystemVerilog. Be ready to explain your role in these projects and how you tackled challenges related to timing closure and resource optimisation.
✨Tip Number 4
Showcase your collaborative skills by highlighting experiences where you worked across different teams, such as design, verification, and algorithm development. This will illustrate your ability to thrive in a team-oriented environment, which is crucial for this role.
We think you need these skills to ace Senior FPGA Design Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your experience in RTL design, particularly with Verilog or SystemVerilog. Emphasise any projects that involved high-throughput, low-power hardware development, as well as your familiarity with FPGA or ASIC systems.
Craft a Strong Cover Letter: In your cover letter, express your enthusiasm for the role and the company's mission in satellite communications. Mention specific skills that align with their requirements, such as your experience with synthesis, timing closure, and resource optimisation.
Showcase Relevant Projects: Include examples of past projects where you developed and integrated IP in multi-block hardware systems. Highlight your contributions to simulation, lab-based validation, and system integration, as these are key aspects of the role.
Highlight Collaboration Skills: Since the role requires collaboration across various teams, make sure to mention any experiences where you worked closely with design, verification, or algorithm teams. Strong communication skills are essential, so provide examples of how you've effectively documented and communicated technical information.
How to prepare for a job interview at Yoh, A Day & Zimmermann Company
✨Showcase Your RTL Expertise
Be prepared to discuss your experience with RTL design using Verilog or SystemVerilog. Highlight specific projects where you tackled complex FPGA or ASIC systems, and be ready to explain your approach to synthesis and timing closure.
✨Demonstrate Problem-Solving Skills
Since this role involves high-performance digital designs, share examples of how you've optimised designs for high-speed signal processing applications. Discuss any challenges you faced and how you overcame them, showcasing your analytical thinking.
✨Familiarity with Verification Methodologies
Make sure to mention your experience with UVM verification methodologies and testbench development. Be ready to discuss how you've integrated IP in multi-block hardware systems and the tools you used for simulation and validation.
✨Emphasise Collaboration and Communication
This position requires working closely with various teams. Prepare to talk about your collaborative experiences, how you communicate technical concepts, and any instances where your documentation skills made a difference in project outcomes.
