Process Integration Engineer

Lumentum have an opportunity for a Process Integration Engineer to join our Chip R&D team to develop and manage wafer fab processes for fabrication of indium phosphide based semiconductor optical components. This role is based at the Caswell, Northamptonshire, UK site. It is an on-site position, with limited opportunity for hybrid working.

JOB ROLE: The Chip R&D department is responsible for development and introduction into production of new lasers, modulators, receivers, and photonic integrated circuits (PICs) for cloud and networking applications. As an integration engineer you will be responsible for the successful implementation of device designs into functional chips. This will require collaborative working with staff from a wide range of engineering teams with many different skills to solve challenging problems with real commercial impact.

KEY RESPONSIBILITIES:

• Integration of processing steps to realise new InP based products for both coherent and direct detection photonic semiconductor components, using existing and new wafer fab processes.
• Improvements of existing wafer fab processes for yield, cost and/or cycle time.
• Writing of process flows/procedures on the wafer fab MES system.
• Monitoring progress and performance of new products through the wafer fab during product development.
• Use of analysis tools, such as SEM, to understand processes.
• Development of new process modules required for realising novel chips, and ensuring these processes are manufacturable in volume.
• Transfer into manufacture these new process steps and new chips.
• Analysis/documentation of product/processes using Six Sigma techniques such as FMEA, capability analysis, design for manufacture/yield, etc.
• Presentation of wafer process information with statistical evidence for manufacturability.
• To act as the interface between the design team and operations engineering and manufacturing teams.
• To be the process expert for the chips, even after transfer to production control.

SKILLS AND EXPERIENCE

Essential Experience and Skills:

• Degree, ideally PhD, in physics, physical chemistry, materials science, or similar.
• Relevant experience in a similar role will be taken into consideration in lieu.
• In-depth practical knowledge of a broad range of semiconductor wafer processing techniques, ideally in III-V materials. This should include several of the following areas: epitaxy, lithography, dry and wet etching, dielectric/metal deposition, implant, diffusion.
• Experience of developing whole device process flows, process integration of existing and new wafer processes.
• Knowledge of direct bandgap semiconductor materials would be advantageous.
• Proven ability to manage and execute complex engineering activities.
• Previous industrial, production wafer fab experience would be advantageous.

Skills/Competencies:

• Ability to use scientific and engineering reasoning in a wide range of situations.
• Familiarity with statistical methods, ideally experience using JMP software.
• Ability to work in a team, and with excellent organizational skills.
• Strong technical leadership skills.
• Able communicator, verbal and written.
• Willingness to travel worldwide to visit other Lumentum engineering teams.

You must have the right to work in the UK. Caswell is based in a rural location in Towcester, Northamptonshire and is not supported by public transport. Please note successful candidates will need to go through a 7-year background check before commencing employment.

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.