Field-Programmable Gate Arrays Engineer (City of London)
Field-Programmable Gate Arrays Engineer (City of London)

Field-Programmable Gate Arrays Engineer (City of London)

London Full-Time 43200 - 72000 £ / year (est.) No home office possible
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At a Glance

  • Tasks: Design high-speed hardware for trading systems and enhance network infrastructure.
  • Company: Join a leading HPC research team focused on innovative engineering solutions.
  • Benefits: Collaborative environment, cutting-edge technology, and opportunities for professional growth.
  • Why this job: Make a real impact in fast-paced trading while solving complex engineering challenges.
  • Qualifications: Bachelor's degree in relevant fields and experience with FPGAs/ASICs required.
  • Other info: Bonus points for post-silicon debugging experience; apply now to join our passionate team!

The predicted salary is between 43200 - 72000 £ per year.

FPGA/ASIC Design: My client is a renowned HPC research-led hardware team that values true engineering expertise and places great emphasis on problem-solving, critical thought, and versatility. The FPGA team collaborates closely with traders and software engineers to identify key challenges and develop effective solutions to issues that occur in sub microsecond trading. At their core, my client embraces a disciplined and scientific approach, crafting solutions that cater to the dynamic needs of trading operations. They take pride in their ability to tackle significant business problems and deliver high-quality outcomes.

Responsibilities:

  • Enhance network infrastructure and trading system components through the design of high-speed hardware for crucial executions.
  • Conduct research on emerging low-latency techniques and platforms, identifying opportunities for integration into our trading system.
  • Collaborate within a multidisciplinary team consisting of traders, software developers, and infrastructure engineers.
  • Utilize server hardware by leveraging the best available hardware or developing in-house solutions for seamless FPGA integration.

Requirements:

  • Possess a Bachelor's degree in Computer Engineering (CE), Electrical Engineering (EE), Computer Science (CS), or a related technical field.
  • Prior experience in designing, coding, testing, and verifying FPGAs and/or ASICs.
  • Proficiency in VHDL, Verilog, SystemVerilog, as well as C or C++ programming languages.
  • Familiarity with RTL synthesis and the ability to write timing, area, and other pertinent constraints.
  • Experience working with digital simulators and self-checking test benches.
  • Bonus points for experience in post-silicon bring-up and debugging.

Join the team of passionate engineers and make a significant impact on our cutting-edge trading systems. If you are motivated to solve challenging problems and deliver top-quality solutions, apply now with your resume and let's discuss how your skills can contribute to our success.

Field-Programmable Gate Arrays Engineer (City of London) employer: Algo Capital Group

As a leading employer in the heart of the City of London, our client offers an exceptional work environment that fosters innovation and collaboration among talented engineers. With a strong focus on employee growth, they provide ample opportunities for professional development and encourage a culture of critical thinking and problem-solving. The dynamic nature of the trading industry, combined with access to cutting-edge technology and a multidisciplinary team, makes this an ideal place for those looking to make a meaningful impact in high-performance computing.
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Contact Detail:

Algo Capital Group Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land Field-Programmable Gate Arrays Engineer (City of London)

✨Tip Number 1

Familiarise yourself with the latest trends in FPGA and ASIC design, especially in relation to high-speed trading systems. This knowledge will not only help you during interviews but also demonstrate your genuine interest in the field.

✨Tip Number 2

Network with professionals in the industry, particularly those who work in high-performance computing or trading environments. Engaging with them on platforms like LinkedIn can provide insights into the company culture and potentially lead to referrals.

✨Tip Number 3

Prepare to discuss specific projects where you've successfully implemented FPGA or ASIC solutions. Be ready to explain your problem-solving approach and how you collaborated with multidisciplinary teams to achieve results.

✨Tip Number 4

Stay updated on emerging low-latency techniques and platforms relevant to trading systems. Being able to discuss these innovations during your conversations will showcase your proactive attitude and technical expertise.

We think you need these skills to ace Field-Programmable Gate Arrays Engineer (City of London)

FPGA Design
ASIC Design
VHDL
Verilog
SystemVerilog
C Programming
C++ Programming
RTL Synthesis
Digital Simulation
Test Bench Development
Timing Analysis
Area Constraints
Low-Latency Techniques
Problem-Solving Skills
Collaboration Skills
Research Skills
Adaptability

Some tips for your application 🫡

Tailor Your CV: Make sure your CV highlights relevant experience in FPGA/ASIC design, programming languages like VHDL and Verilog, and any specific projects that demonstrate your problem-solving skills. Customise it to reflect the requirements mentioned in the job description.

Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for engineering and your understanding of high-speed hardware solutions. Mention specific examples of how you've tackled challenges in previous roles, particularly in low-latency environments.

Highlight Collaborative Experience: Since the role involves working closely with traders and software engineers, emphasise any past experiences where you collaborated in multidisciplinary teams. This will show your ability to communicate effectively and work towards common goals.

Showcase Continuous Learning: Mention any recent courses, certifications, or research you've undertaken related to emerging low-latency techniques or FPGA technologies. This demonstrates your commitment to staying updated in a fast-evolving field.

How to prepare for a job interview at Algo Capital Group

✨Showcase Your Technical Skills

Be prepared to discuss your experience with FPGA and ASIC design in detail. Highlight specific projects where you used VHDL, Verilog, or SystemVerilog, and be ready to explain your design choices and the outcomes.

✨Demonstrate Problem-Solving Abilities

Since the role involves tackling significant business problems, think of examples where you've successfully solved complex issues. Use the STAR method (Situation, Task, Action, Result) to structure your responses.

✨Understand the Trading Environment

Familiarise yourself with the basics of high-frequency trading and low-latency techniques. Showing that you understand the context in which your work will be applied can set you apart from other candidates.

✨Prepare for Team Collaboration Questions

As the role requires collaboration with traders and software engineers, be ready to discuss your experience working in multidisciplinary teams. Share examples of how you’ve effectively communicated and collaborated with others to achieve a common goal.

Field-Programmable Gate Arrays Engineer (City of London)
Algo Capital Group
A
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