Principal Digital (RTL) Design Engineer

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Principal Digital (RTL) Design Engineer, Bracknell

Client: onsemi

Location: Bracknell

Job Category: Other

EU work permit required: Yes

Job Reference: aa54a36888c9

Job Views: 6

Posted: 02.06.2025

Expiry Date: 17.07.2025

Job Description:

Job Summary:

onsemi is seeking a self-starter to join an established team designing and verifying digital front-end sub-systems of CMOS imaging sensors/ASICs. The role involves all aspects of front-end RTL design and verification, from analyzing requirements and producing design documents to coding and verification, then handing off to back-end synthesis and implementation teams. The ideal candidate should have experience designing and verifying low-level blocks for ASIC environments, preferably for automotive applications.

Performance Objectives

The successful candidate will participate in the following activities:

• Digital design using RTL coding, block and top-level verification, digital constraints, synthesis, ATPG, STA, etc.
• Expertise in SystemVerilog and RTL design and verification
• Coding skills in tcl/perl/Python and Verilog/SystemVerilog RTL
• Experience in maintaining design processes

Added Value

• Knowledge of CMOS image sensors
• Understanding of designing for the automotive ADAS market
• Ability to work independently and support remote design teams
• Leadership in process and quality improvements

Requirements:

• Bachelor\’s/Master\’s in Electronics/Computing
• Fluency in English (written and spoken)
• Knowledge of SystemVerilog, digital circuit design (state machines, control logic, filters, memory interfaces), digital verification (randomized testing, code coverage, verification), UVM (a plus), logic synthesis, DFT, ATPG, STA skills (a plus), Linux, and scripting languages (Perl, Python, shell, tcl)

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