Senior Digital IC Design Engineer (Glasgow)

Neuranics is a fast-growing fabless semiconductor company pioneering the future of magnetic sensing solutions. Based in Glasgow, we are developing cutting-edge Tunnelling Magnetoresistance (TMR) sensors that are enabling the next generation of wearables, XR, and advanced human-machine interaction.

As we push the boundaries of magnetic sensing, this role offers the opportunity to work on real innovations that will shape the future of sensing. You’ll be part of a fast-moving team developing technology that is unlocking new possibilities for next-generation devices, working closely with Tier 1 consumer electronics and semiconductor companies. This is a chance to make a real impact, tackling challenges and driving breakthrough solutions in exciting and rapidly evolving markets.

Job Summary:

As an RTL Design Engineer, you will be responsible for the design, implementation, and verification of digital logic for our custom ASICs for a state-of-the-art System-on-Chip for next-generation quantum sensing. You will work closely with analog designers, layout engineers, electronics engineers, and sensor experts to translate system-level requirements into efficient and reliable RTL using Verilog. The role is hands-on and will involve extensive work within the Cadence toolchain.

Key Responsibilities:

• Develop synthesizable Verilog RTL for core digital blocks interfacing with TMR-based analog front ends and system controllers
• Collaborate with the ASIC and sensor system designers to define block-level specifications
• Perform RTL simulation and functional verification using Cadence tools
• Support ASIC tape-out flow and post-silicon bring-up alongside test engineers
• Contribute to system integration with embedded software and mixed-signal components
• Document design specifications, verification plans, and testbench structures

Requirements:

• BSc/MSc/PhD in Electrical Engineering, Computer Engineering, or related field
• 5+ years of experience in ASIC/FPGA RTL design, preferably for low-power wearable or biomedical applications
• Strong proficiency in Verilog HDL and digital design fundamentals
• Understanding of RTL to GDS signoff flow (STA, clock tree synthesis, DFT etc.)
• Hands-on experience with Cadence tools
• Solid understanding of clock domain crossing, low-power design (UPF), and bus protocols
• Strong documentation and communication skills, with the ability to engage with the wider ASIC and engineering teams as required
• Self-motivated and adaptable, capable of working independently or within a team in a fast-paced environment
• Ability to work on site in a Glasgow based facility
• Previous work with custom silicon for biosensors or MEMS/TMR-based systems
• Experience with power and area optimization techniques for wearable devices
• Exposure to mixed-signal simulation environments and AMS verification
• Familiarity with firmware-hardware integration and embedded systems
• Experience in integrating Arm processors and/or Bluetooth circuit blocks to the ASIC

Why Join Us?

Join a rapidly growing deep-tech company at the forefront of magnetic sensing solutions. At Neuranics, you’ll work on real-world innovations, collaborating with Tier 1 consumer electronics and semiconductor companies to shape the future of wearables, XR, and human-machine interaction.

You’ll be part of a fast-moving, collaborative team, developing groundbreaking technology and pushing the limits of what’s possible in sensing. If you’re looking to make a real impact, contribute to cutting-edge projects, and grow with a company leading the way in innovation, we want to hear from you.

What We Offer:

• Enhanced Annual Bonus Scheme
• Share Options
• Private Health Insurance
• Life Insurance
• Company Pension Scheme
• Work on cutting-edge technology with a rapidly growing team
• Friendly, fast-paced office environment

Apply via our website: https://neuranics.com/career/rtl-design-engineer/ or email info@neuranics.com with your CV and cover letter.