GPU Shader/Accelerator Hardware Architect

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data centre, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

We are looking for engineers who are motivated to challenge the status quo. If you are excited about building the next generation GPU shader / Machine Learning core, our team is on the lookout for you! You will be part of a fast-paced team developing next generation GPU shader and machine learning (ML) core. You will work with engineers of varied disciplines who are responsible for designing, verifying and delivering Core IP for various products. Since core is the “most prominent” asset in GPU/ Accelerator IP, we strive to challenge ourselves in beating area, power and performance targets. No idea is too small; we welcome every initiative that makes our product better.

You will be working on the overall Architecture of Shader/ML core. You will be the key point of contact for leaders of various functional organizations. You will work closely with S/W architect, Power & Performance Architecture to define changes in ISA (instruction set architecture), feature sets for next gen GPU and ML Accelerator products. You will work with micro-architecture leads and physical design leads to strive for best in class PPA. You will review design, and verification plans and will be guide for the implementation teams.

You are an “out of the box” thinker, open to challenge the status quo, willing to take risk and always on the lookout for improvement.

KEY RESPONSIBILITIES:

• Define the next generation architecture and ISA for shader processor / ML core (work sequencer, Arithmetic blocks etc)
• Work with S/W architect, H/W micro-architect, physical design leads to define a PPA efficient design from end-end.
• Mentor, guide and review block design and verification engineers’ tasks.
• Own Architecture features, ROI statement and specs.
• Work with micro-architect to help them define micro-architecture.
• Own power, performance and area budgets.
• Lead workgroup with various stakeholders to ensure Shader meets or beats its KPI targets.

PREFERRED EXPERIENCE:

• Industry experience in GPU shader pipeline or CPU core pipeline or ML core and ISA (instruction set architecture).
• Industry experience in hardware design and overall ASIC design flow.
• Industry experience in leading a design, analyzing power, frequency and area trade-offs.
• Industry experience using various EDA tools for functional, performance and power validation on pre-silicon, emulation and post-silicon environment.

ACADEMIC CREDENTIALS:

• Bachelors or master’s in electrical/electronic engineering.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, colour, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.