Find a job 
Featured Companies 
Featured Universities 
For Companies At a Glance
- Tasks: Verify complex digital designs and ensure functionality meets specifications.
- Company: Join a global Semiconductor giant in the vibrant Greater Bristol Area.
- Benefits: Enjoy a collaborative work environment with opportunities for professional growth.
- Why this job: Be part of a dynamic team making an impact in cutting-edge technology.
- Qualifications: Bachelor's or Master's in Electrical/Computer Engineering; UVM and SystemVerilog experience required.
- Other info: Contact Rachel Mason at IC Resources for more details.
The predicted salary is between 36000 - 60000 £ per year.
I am looking for a skilled Design Verification Engineer to join a dynamic team at a global Semiconductor giant in Bristol. The Design Verification Engineer will be responsible for verifying complex digital designs and ensuring that the functionality and performance meet the required specifications.
Responsibilities
- Developing and implementing verification plans for digital designs using UVM (Universal Verification Methodology)
- Collaborating with cross-functional teams to understand design requirements and contributing to the design verification strategy
- Writing and maintaining verification test benches, test cases, and coverage models
- Performing functional and code coverage analysis to ensure comprehensive verification of the design
- Debugging test failures and working closely with design teams to resolve issues
- Contributing to the improvement of verification processes and methodologies
Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field
- Solid understanding and hands-on experience with UVM and SystemVerilog
- Proficiency in scripting languages such as Perl, Python, or TCL
- Mid-Senior level
As a Design Verification Engineer, the individual will spend their days collaborating with design and verification teams to ensure successful verification and validation of digital designs. They will write and maintain test cases, analyze code coverage, and participate in debugging and issue resolution activities. The role will also involve contributing to the improvement of verification processes and methodologies and engaging in cross-functional communication to align on design verification strategies.
For more information, please contact Rachel Mason at IC Resources.
Design Verification Engineer (Greater Bristol Area) employer: IC Resources
Contact Detail:
IC Resources Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Design Verification Engineer (Greater Bristol Area)
✨Tip Number 1
Familiarise yourself with UVM and SystemVerilog if you haven't already. Consider working on personal projects or contributing to open-source projects that utilise these methodologies, as hands-on experience will make you stand out.
✨Tip Number 2
Network with professionals in the semiconductor industry, especially those who work in design verification. Attend local meetups or online webinars to connect with potential colleagues and learn about the latest trends and challenges in the field.
✨Tip Number 3
Brush up on your scripting skills, particularly in Perl, Python, or TCL. Create small scripts to automate tasks related to verification processes, as this will demonstrate your initiative and technical prowess during interviews.
✨Tip Number 4
Prepare for technical interviews by practising common design verification problems and scenarios. Engage in mock interviews with peers or mentors to refine your problem-solving approach and communication skills.
We think you need these skills to ace Design Verification Engineer (Greater Bristol Area)
Some tips for your application 🫡
Understand the Role: Before applying, make sure to thoroughly understand the responsibilities of a Design Verification Engineer. Familiarise yourself with UVM and SystemVerilog, as well as the specific requirements mentioned in the job description.
Tailor Your CV: Customise your CV to highlight relevant experience and skills that align with the job description. Emphasise your hands-on experience with UVM, SystemVerilog, and any scripting languages you are proficient in.
Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for design verification and your understanding of the semiconductor industry. Mention specific projects or experiences that demonstrate your ability to meet the role's requirements.
Proofread Your Application: Before submitting, carefully proofread your application materials. Check for any spelling or grammatical errors, and ensure that all information is clear and concise. A polished application reflects your attention to detail.
How to prepare for a job interview at IC Resources
✨Know Your UVM Inside Out
Make sure you have a solid understanding of Universal Verification Methodology (UVM). Be prepared to discuss your experience with it, including specific projects where you've implemented UVM in your verification plans.
✨Showcase Your Scripting Skills
Since proficiency in scripting languages like Perl, Python, or TCL is essential, be ready to demonstrate your skills. You might be asked to solve a problem on the spot, so brush up on your coding abilities and be prepared to explain your thought process.
✨Prepare for Technical Questions
Expect technical questions related to digital design verification, functional and code coverage analysis, and debugging techniques. Review common challenges faced in these areas and think about how you would approach them.
✨Emphasise Collaboration Experience
As the role involves working closely with cross-functional teams, highlight your collaboration experiences. Share examples of how you've successfully communicated and worked with others to achieve design verification goals.
