At a Glance
- Tasks: Lead and mentor engineers in cutting-edge SoC projects, focusing on storage verification.
- Company: Join a leading semiconductor firm known for innovative ASIC development and industry success.
- Benefits: Enjoy competitive salary, hybrid work, generous holiday, and comprehensive health benefits.
- Why this job: Be part of a dynamic multi-discipline team tackling exciting challenges in a collaborative environment.
- Qualifications: 15-20+ years in digital ASIC design; expertise in Systemverilog, UVM, and scripting languages required.
- Other info: Visa sponsorship and relocation support available; quick interview process within 2-3 weeks.
The predicted salary is between 76000 - 104000 £ per year.
Due to our continued growth, our semiconductor client is looking for a Principal/Lead Storage Verification Engineer to join their cutting-edge SoC team in the development of ASICs. The successful candidate will be working with experts in different aspects of SoC development on state-of-the-art projects. You will be given the opportunity to undertake role-specific training to further develop your knowledge, experience, and career development. The successful candidate will also be working directly for an industry-renowned Senior Director who has built and established many multi-discipline teams throughout their career, and his teams have enjoyed major success. This team is going to be a pure multi-discipline team which can tackle any issue that comes their way and become some of the industry's most well-rounded engineers.
Expected Contributions:
- Mentoring and guiding engineers and peers.
- Collaborating with senior principal engineers.
- Expert-level understanding of different parts of the design & verification cycle.
- Experience working with leading-edge EDA tools and process nodes using industry-standard languages and methodologies (e.g., Systemverilog, UVM, Formal).
- Working on high-volume data centre & enterprise products used by industry-leading companies.
- Experience of working on projects with teams located internationally.
Qualifications and Skills:
- 15-20+ years of digital ASIC design and verification experience.
- Vast experience of translating design requirements into RTL.
- Deriving functional requirements for verification.
- Systemverilog UVM test benches.
- Scripting languages & REST APIs (e.g., Perl/Python/TCL).
- Team player with good verbal and written communication skills.
Desirable Skills:
- Experience of formal verification (Jasper Gold or VC_Formal).
- Experience using SV UVM 1800.2.
- Familiarity with C/C++.
- Experience with any of the following storage interfaces: SAS, PCIe, NVMe (preferred), or SATA.
Salary and Package:
- Competitive salaries ranging from £95,000 – £130,000 (depending on level and experience).
- 10%-20% bonus (based on company and individual performance).
- 25 days holiday + 8 days bank holiday per year.
- 3 days a week on-site hybrid working.
- Pension (matched group pension up to 8%).
- Life assurance.
- Income protection.
- Private medical.
- Employee supported volunteering.
- Employee assistance program for health well-being, financial services, legal services, etc.
- Training and development.
- Visa sponsorship available.
- Relocation support (if required).
My client can offer a 3-stage process consisting of a 1st stage video call, 2nd stage video call, and a 3rd stage on-site interview (meet the team and site tour). This process can be completed within 2-3 weeks (based on availability).
Principal/Lead Storage Verification Engineer employer: Elite People Partners Ltd
Contact Detail:
Elite People Partners Ltd Recruiting Team
StudySmarter Expert Advice 🤫
We think this is how you could land Principal/Lead Storage Verification Engineer
✨Tip Number 1
Network with professionals in the semiconductor industry, especially those who have experience in ASIC development. Attend relevant conferences or webinars to connect with potential colleagues and learn about the latest trends in storage verification.
✨Tip Number 2
Familiarise yourself with the specific EDA tools and methodologies mentioned in the job description, such as Systemverilog and UVM. Consider taking online courses or certifications to enhance your skills and demonstrate your commitment to staying current in the field.
✨Tip Number 3
Prepare to discuss your mentoring and collaboration experiences during the interview process. Think of specific examples where you guided peers or worked with multi-discipline teams, as this will showcase your leadership abilities and fit for the role.
✨Tip Number 4
Research the company’s recent projects and achievements in the storage verification space. Being knowledgeable about their work will not only impress your interviewers but also help you articulate how your skills align with their goals.
We think you need these skills to ace Principal/Lead Storage Verification Engineer
Some tips for your application 🫡
Tailor Your CV: Make sure your CV highlights your 15-20+ years of digital ASIC design and verification experience. Emphasise your expertise in Systemverilog, UVM, and any relevant scripting languages like Python or Perl.
Craft a Strong Cover Letter: In your cover letter, express your enthusiasm for the role and the company. Mention specific projects or experiences that align with the job description, particularly your mentoring experience and collaboration with multi-discipline teams.
Showcase Relevant Skills: Clearly outline your experience with leading-edge EDA tools and your understanding of the design & verification cycle. If you have experience with storage interfaces like NVMe or SAS, make sure to highlight this as it is preferred.
Prepare for Interviews: Since the interview process includes video calls and an on-site meeting, prepare by reviewing common technical questions related to ASIC design and verification. Be ready to discuss your past projects and how you've contributed to team success.
How to prepare for a job interview at Elite People Partners Ltd
✨Showcase Your Expertise
As a Principal/Lead Storage Verification Engineer, it's crucial to demonstrate your extensive experience in digital ASIC design and verification. Be prepared to discuss specific projects where you've successfully translated design requirements into RTL and derived functional requirements for verification.
✨Highlight Collaboration Skills
This role involves working closely with multi-discipline teams and mentoring peers. Share examples of how you've collaborated with senior engineers and contributed to team success, especially in international settings.
✨Familiarise Yourself with EDA Tools
Make sure you are well-versed in the leading-edge EDA tools and methodologies mentioned in the job description, such as Systemverilog, UVM, and formal verification tools. Being able to discuss your hands-on experience with these tools will set you apart.
✨Prepare for Technical Questions
Expect technical questions related to scripting languages and storage interfaces like SAS, PCIe, NVMe, or SATA. Brush up on your knowledge in these areas and be ready to solve problems or answer scenario-based questions during the interview.