SoC Physical Design Engineer
SoC Physical Design Engineer

SoC Physical Design Engineer

Reading Full-Time 43200 - 72000 £ / year (est.) No home office possible
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At a Glance

  • Tasks: Join us as a SoC Physical Design Engineer, implementing cutting-edge designs and collaborating with customers.
  • Company: Synopsys is a leader in chip design and technology innovation, shaping the future of intelligence.
  • Benefits: Enjoy comprehensive health, wellness, and financial benefits tailored to your needs.
  • Why this job: Be part of a dynamic team driving innovation in high-performance computing and AI applications.
  • Qualifications: BSEE/MSEE/PhD required with 8+ years in SoC physical implementation and expertise in RTL2GDSII.
  • Other info: Work in a fast-paced environment with opportunities for travel and on-site collaboration.

The predicted salary is between 43200 - 72000 £ per year.

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly skilled and experienced SoC Physical Design specialist with a passion for innovation and technology. You have a proven track record in delivering physical implementation on SoCs and possess deep expertise in RTL2GDSII design flow methodology. Your experience with synthesis, place and route, clock implementation, SoC power implementation, SoC timing analysis, and physical verification makes you an invaluable asset to any team. You excel in a customer-focused environment, possess excellent communication skills, and are willing to occasionally travel or work on-site at customer premises.

What You’ll Be Doing:

  • Performing SoC Physical Design implementation (RTL2GDSII) at block and chip levels
  • Providing RTL2GDSII design flow methodology expertise.
  • Collaborating with customers to provide specific design skills and assistance for Block and SoC development
  • Developing and tuning block and SoC level constraints
  • Implementing low power designs and developing UPF constraints
  • Closing timing in high-speed designs and leading edge technologies
  • Performing physical implementation of Arm-based sub-systems
  • Working on hierarchical design planning and Implementation flow

The Impact You Will Have:

  • Enabling leading edge customers to complete their most challenging SoC design projects using Synopsys EDA tool suite
  • Driving innovation in telecommunications, wireless, broadband, automotive, AI, and high-performance computing applications
  • Enhancing the performance and efficiency of SoC designs
  • Contributing to the successful deployment of design flow and methodology
  • Ensuring the delivery of high-quality, reliable SoCs to market
  • Supporting the growth and success of Synopsys\’ System Solution Group (SSG), EDA tools and solutions

What You’ll Need:

  • BSEE/MSEE/PhD in Electrical and/or Computer Engineering.
  • At least 8 years’ experience in delivering physical implementation on SoCs
  • Proficiency with Synopsys RTL2GDSII toolset including Design Compiler, IC Compiler, Fusion Compiler, RTLA, PrimeTime, StarRCXT, and ICV
  • Experience with synthesis, place and route, clock implementation, SoC power implementation, SoC timing analysis, and physical verification
  • Experience with Block and SoC level constraints development, Static Timing analysis and Signoff, Timing ECOs
  • Experience in scan insertion and understanding/tuning DFT Constraints
  • Knowledge of low power designs, UPF constraints, and implementation
  • Experience in implementation of large hierarchical designs from floorplanning, power planning, partitioning, clock tree planning, budgeting
  • Experience working in a customer focused environment with great communication skills
  • Programing skills in TCL , PERL , Python, Makefile, shell scripting

Who You Are:

  • Detail-oriented with strong analytical skills
  • Excellent communicator and team player
  • Customer-focused with a proactive problem-solving attitude
  • Adaptable and capable of working in a fast-paced environment
  • Willing to travel occasionally and work on-site as needed

The Team You’ll Be A Part Of:

You will be part of Synopsys\’ System Solution Group (SSG), which delivers tool, methodology, design creation, verification, and implementation expertise. Our team collaborates with customers ranging from industry leaders to start-ups, developing products for various applications. We provide specific design skills for SoC development, design flow and methodology deployment, RTL2GDSII implementation, and full SoC turnkey design from specification to parts.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings.

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SoC Physical Design Engineer employer: Synopsys Inc

At Synopsys, we pride ourselves on being an exceptional employer, fostering a culture of innovation and collaboration that empowers our employees to thrive. With a comprehensive benefits package and a commitment to professional growth, we provide our SoC Physical Design Engineers with the tools and support they need to excel in their careers while working on cutting-edge technologies that shape the future. Join us in a dynamic environment where your contributions directly impact leading-edge projects across various industries, from automotive to AI.
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Contact Detail:

Synopsys Inc Recruiting Team

StudySmarter Expert Advice 🤫

We think this is how you could land SoC Physical Design Engineer

✨Tip Number 1

Familiarize yourself with the Synopsys RTL2GDSII toolset. Since proficiency in tools like Design Compiler and IC Compiler is crucial for this role, consider taking online courses or tutorials to sharpen your skills.

✨Tip Number 2

Network with professionals in the semiconductor industry. Attend relevant conferences or webinars where you can meet people from Synopsys or similar companies, as personal connections can often lead to job opportunities.

✨Tip Number 3

Showcase your experience with low power designs and UPF constraints in your discussions. Being able to articulate your hands-on experience in these areas will demonstrate your fit for the role.

✨Tip Number 4

Prepare to discuss specific projects where you've successfully implemented SoC designs. Highlighting your problem-solving skills and customer-focused approach during interviews will set you apart from other candidates.

We think you need these skills to ace SoC Physical Design Engineer

SoC Physical Design
RTL2GDSII Design Flow Methodology
Synthesis
Place and Route
Clock Implementation
SoC Power Implementation
SoC Timing Analysis
Physical Verification
Static Timing Analysis
Timing ECOs
Low Power Design
UPF Constraints
Hierarchical Design Planning
Floorplanning
Power Planning
Partitioning
Clock Tree Planning
TCL Programming
PERL Programming
Python Programming
Shell Scripting
Excellent Communication Skills
Customer-Focused Problem Solving
Detail-Oriented
Analytical Skills
Adaptability

Some tips for your application 🫡

Understand the Role: Make sure to thoroughly read the job description for the SoC Physical Design Engineer position at Synopsys. Understand the key responsibilities and required skills, especially in RTL2GDSII design flow methodology and physical implementation.

Tailor Your CV: Customize your CV to highlight your relevant experience in SoC physical design, including specific tools like Design Compiler and IC Compiler. Emphasize your achievements in previous roles that align with the responsibilities listed in the job description.

Craft a Compelling Cover Letter: Write a cover letter that showcases your passion for innovation and technology. Mention your experience with synthesis, place and route, and your ability to work in a customer-focused environment. Make it clear why you want to join Synopsys and how you can contribute to their team.

Highlight Communication Skills: Since excellent communication skills are emphasized in the job description, provide examples in your application of how you've successfully collaborated with teams or customers in past projects. This will demonstrate your fit for the role.

How to prepare for a job interview at Synopsys Inc

✨Showcase Your Technical Expertise

Be prepared to discuss your experience with RTL2GDSII design flow methodology in detail. Highlight specific projects where you successfully implemented physical designs, focusing on synthesis, place and route, and timing analysis.

✨Demonstrate Customer-Focused Mindset

Since the role emphasizes collaboration with customers, share examples of how you've effectively communicated and worked with clients in previous positions. This will show your ability to thrive in a customer-focused environment.

✨Prepare for Problem-Solving Scenarios

Expect questions that assess your problem-solving skills, especially in high-speed designs and low power implementations. Be ready to explain your thought process and the methodologies you used to overcome challenges.

✨Familiarize Yourself with Synopsys Tools

Make sure you are well-versed in the Synopsys RTL2GDSII toolset, including Design Compiler and PrimeTime. Being able to discuss your proficiency with these tools will demonstrate your readiness for the role.

SoC Physical Design Engineer
Synopsys Inc
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  • SoC Physical Design Engineer

    Reading
    Full-Time
    43200 - 72000 £ / year (est.)

    Application deadline: 2027-03-28

  • S

    Synopsys Inc

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